MC68HC11G5 Datasheet, PDF (10/195 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller

Freescale Semiconductor, Inc.
TABLE OF CONTENTS (Continued)
Paragraph
Number
Title
Page
Number
11.5
11.5.1
11.5.2
11.5.3
11.5.3.1
11.5.3.2
11.5.3.3
11.5.3.4
11.5.3.5
11.5.3.6
11.5.3.7
11.5.3.8
11.5.3.9
11.6
11.6.1
11.6.2
11.6.3
11.6.4
11.6.5
11.6.6
11.7
11.8
11.9
Mode 3: 8-bit PWM with 256 Clock Prescaler ..............................................
Operation of Pulse Width Modulation Unit in Mode 3 .............................
Operation of Pulse Accumulator Unit in Mode 3 ....................................
Register Functions in Mode 3 .................................................................
Counter 1 (EVCNT1) ........................................................................
Compare Register 1A (ECMP1A) .....................................................
Compare Register 1B (ECMP1B) .....................................................
Counter 2 (EVCNT2) ........................................................................
Compare Register 2A (ECMP2A) .....................................................
Compare Register 2B (ECMP2B) .....................................................
Input Unit 1 (EVI1) ............................................................................
Input Unit 2 (EVI2) ............................................................................
Output Unit (EVO) .............................................................................
Event Counter Registers ..............................................................................
Counter Clock Register (EVCLK) ...........................................................
Counter Control Register (EVCTL) .........................................................
Counters Enable/Interrupt Mask Register (EVMSK) ..............................
Interrupt Flag Register (EVFLG) ............................................................
Counter Registers (EVCNTx) .................................................................
Counter Compare Registers (ECMPx) ...................................................
PWM using the Event Counter .....................................................................
Effective Range of the Set Up Values ..........................................................
Boundary Conditions of the PWM Function .................................................
Section 12
CPU, Addressing Modes and Instruction Set
12.1
12.1.1
12.1.2
12.1.3
12.1.4
12.1.5
12.1.6
12.2
12.2.1
12.2.2
12.2.3
12.2.4
12.2.5
12.2.6
Programming Model and CPU Registers .....................................................
Accumulators A and B ............................................................................
Index Register X (IX) ..............................................................................
Index Register Y (IY) ..............................................................................
Stack Pointer (SP) ..................................................................................
Program Counter (PC) ...........................................................................
Condition Code Register (CCR) .............................................................
Addressing Modes .......................................................................................
Immediate Addressing (IMM) .................................................................
Direct Addressing (DIR) .........................................................................
Extended Addressing (EXT) ...................................................................
Indexed Addressing (IND, X; IND, Y) .....................................................
Inherent Addressing (INH) ......................................................................
Relative Addressing (REL) .....................................................................
11-12
11-12
11-13
11-14
11-14
11-14
11-14
11-14
11-14
11-14
11-14
11-15
11-15
11-15
11-15
11-16
11-17
11-18
11-18
11-19
11-19
11-19
11-20
12-1
12-2
12-2
12-2
12-2
12-2
12-2
12-3
12-3
12-3
12-4
12-4
12-4
12-4
viii
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