MC68HC11G5 Datasheet, PDF (67/195 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller

Freescale Semiconductor, Inc.
5.2.7 “Highest Priority I” Interrupt and Miscellaneous Register (HPRIO)
7
6
5
4
3
2
1
0
$103C RBOOT SMOD MDA PSEL4 PSEL3 PSEL2 PSEL1 PSEL0 HPRIO
RESET: —
—
—
0
0
1
1
0
RBOOT — Read Bootstrap ROM
READ: Any time.
WRITE: Only while SMOD = 1 (test or bootstrap modes).
RESET: Set in Bootstrap mode, cleared in all other modes.
0 – Bootstrap ROM disabled and not in memory map.
1 – Bootstrap ROM enabled in memory map at $BF00 through $BFFF.
SMOD and MDA — Special Mode Select and Mode Select A
READ: Any time.
WRITE: SMOD may only be written to a 0. MDA may be written any time while SMOD =
1, but MDA may only be written once while SMOD = 0.
RESET: These bits reflect the status of the MODB and MODA input pins at the rising
edge of reset.
An interpretation of the values of SMOD and MDA is shown in Table 5-3.
Note: SMOD cannot be written to a logic one after being cleared.
Table 5-3. Special Mode Select and Mode Select A Table
Input Pins
MODA MODB
0
1
1
1
0
0
1
0
Mode Selected
Single Chip
Expanded Non-Multiplexed
Bootstrap
Test
Latched at Reset
SMOD
MDA
0
0
0
1
1
0
1
1
RESETS, INTERRUPTS AND LOW POWER MODES
5-15
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