MC68HC11G5 Datasheet, PDF (98/195 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller

Freescale Semiconductor, Inc.
7.7 TRANSMIT DATA (TXD)
Transmit data is the serial data from the internal data bus that is applied through the serial
communications interface to the output line. The transmitter generates a bit time by using a
derivative of the RT clock, thus producing a transmission rate equal to 1/16th that of the receiver
sample clock.
7.8 SCI REGISTERS
Primarily the SCI system is configured and controlled by five registers BAUD, SCCR1, SCCR2,
SCSR, and SCDAT). In addition, the Port D data and data direction registers and the Port D wired-
OR mode bit in the SPCR register are secondarily related to the SCI system. Reference should be
made to the block diagram shown in Figure 7-1.
7.8.1 Serial Communications Data Register (SCDAT)
The SCI data register (SCDAT) shown in the following figure is actually two separate registers.
When SCDAT is read, the read-only receive data register is accessed and when SCDAT is written,
the write-only transmit data register is accessed.
7
6
5
4
3
2
1
0
$102F BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 SCDAT
RESET:
0
0
0
0
0
0
0
0
READ: Accesses the read-only SCI receive data register (RDR).
WRITE: Accesses the write-only SCI transmit data register (TDR).
RESET: Does not affect this address.
7.8.2 Serial Communications Control Register 1 (SCCR1)
The SCI control register 1 (SCCR1) contains control bits related to the nine data bit character format
and the receiver wake-up feature. Four of the bits in this register are not used and always read as
zeros.
7
6
5
4
3
2
1
0
$102C R8
T8
0
M WAKE 0
0
0
SCCR1
RESET: U
U
0
0
0
0
0
0
SERIAL COMMUNICATIONS INTERFACE
7-8
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