MC68HC11G5 Datasheet, PDF (125/195 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller

Freescale Semiconductor, Inc.
10.5.2 Period Registers (PWPERX)
There is one period register for each channel. The value in this register determines the period of the
associated PWM timer channel.
In terms of the internal PWM circuitry, this register is connected to a buffer which compares with the
counter register directly. The period value in this register is loaded into the buffer when the counter
is cleared by the termination of the previous period or by a write to the counter. This register can be
written at any time, and the written value will take effect from the next PWM timer cycle. Reading
this register returns the most recent value written.
7
6
5
4
3
2
1
0
$1068 BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 PWPER1
$1069 BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 PWPER2
$106A BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 PWPER3
$106B BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 PWPER4
READ: Any time.
WRITE: Any time.
RESET: $FF.
10.5.3 Duty Registers (PWDTYx)
There is one duty register for each channel. The value in this register determines the duty cycle of
the associated PWM timer channel.
In terms of the internal PWM circuitry, this register is connected to a buffer which compares with the
counter directly. The duty value in this register is loaded into the second buffer when the counter
is cleared by previous period termination or the counter write operation. This register can be written
at any time, and the written value will take effect from the next PWM timer cycle. Reading this register
returns the most recent value written.
PULSE WIDTH MODULATION TIMER
10-5
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