MC68HC11G5 Datasheet, PDF (145/195 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller

Freescale Semiconductor, Inc.
11.5.3.8
Input Unit 2 (EVI2)
This input unit selects the clock source for EVCNT2. If the input signal EVI2 (PH4) is used as a clock
source, this unit will select the rising edge or falling edge of the input signal. If the time base counter
is used as a clock source, this unit will select the active gate input level which inhibits counting while
this input signal is at the active level. Even if the time base counter has selected one of the eight clock
rates (E, E/2, E/4, E/8, E/16, E/32, E/64, or E/128), this input selector can select the E-clock
independently as its clock source.
11.5.3.9
Output Unit (EVO)
This unit controls the output signal from the PWM unit. If the EVOEN bit in the EVCTL register is set
to one, the EVO unit is enabled. The state of the EVPOL bit in the EVCTL register then determines
the polarity of the event output. If EVO is not required for PWM, the EVOEN bit should be reset to
zero to disable the EVO unit and to allow pin PH6 to be used for general purpose I/O.
11.6 EVENT COUNTER REGISTERS
11.6.1 Counter Clock Register (EVCLK)
7
$1070
RESET:
0
6
5
4
3
2
1
0
EVMDB EVMDA
EVCKC EVCKB EVCKA EVCLK
0
0
0
0
0
0
0
READ: Any time.
WRITE: Any time.
RESET: $00.
EVMDB, EVMDA — Event Counter Mode bits
These two bits determine which event counter mode will be used.
EVMDB
0
0
1
1
EVMDA
0
1
0
1
MODE
0
1
2
3
(8-bit PWM with selectable phase shift)
(8-bit PWM and 8-bit pulse accumulator)
(8-bit PWM with period counter)
(8-bit PWM with 256 clock prescaler)
EVCKC, EVCKB, EVCKA — Event Counter Prescaler bits
These three bits control the time-base counter. They select the prescaler value used to
scale the E-clock before driving the event counters.
EVENT COUNTER
11-15
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