MC68HC11G5 Datasheet, PDF (4/195 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller

Freescale Semiconductor, Inc.
TABLE OF CONTENTS (Continued)
Paragraph
Number
Title
Page
Number
Section 3
Memory and Control/Status Registers
3.1
ROM .............................................................................................................
3-1
3.2
Bootstrap ROM ............................................................................................
3-1
3.3
RAM .............................................................................................................
3-1
3.4
Memory Map ................................................................................................
3-2
3.4.1
Single Chip Mode ...................................................................................
3-2
3.4.2
Expanded Non-multiplexed Mode ..........................................................
3-3
3.4.3
Special Bootstrap Mode .........................................................................
3-4
3.4.4
Special Test Mode ..................................................................................
3-4
3.4.5
Changing Modes ....................................................................................
3-4
3.5
System Configuration ...................................................................................
3-4
3.5.1
RAM and I/O Mapping Register (INIT) ...................................................
3-5
3.5.2
Configuration Control Register (CONFIG) ..............................................
3-6
3.6
Control/Status Registers ..............................................................................
3-6
Section 4
Input/Output Ports
4.1
Mode Dependencies ....................................................................................
4-1
4.2
General Purpose I/O (Ports A, C, D, G, H, and J) .......................................
4-2
4.3
Fixed Direction I/O (Ports B, E, and F) ........................................................
4-2
4.4
Port A ...........................................................................................................
4-2
4.4.1
Data Register (PORTA ) .........................................................................
4-3
4.4.2
Data Direction Register (DDRA ) ............................................................
4-3
4.5
Port B ...........................................................................................................
4-4
4.5.1
Data Register (PORTB) ..........................................................................
4-4
4.6
Port C ...........................................................................................................
4-4
4.6.1
Data Register (PORTC) .........................................................................
4-5
4.6.2
Data Direction Register (DDRC) ............................................................
4-5
4.7
Port D ...........................................................................................................
4-5
4.7.1
Data Register (PORTD) .........................................................................
4-6
4.7.2
Data Direction Register (DDRD) ............................................................
4-6
4.8
Port E ...........................................................................................................
4-7
4.8.1
Data Register (PORTE) ..........................................................................
4-7
4.9
Port F ...........................................................................................................
4-8
4.9.1
Data Register (PORTF) ..........................................................................
4-8
ii
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