MC68HC11G5 Datasheet, PDF (112/195 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller

Freescale Semiconductor, Inc.
the master device. At the completion or transmitting a byte of data, the SPIF status bit is set in both
the master and slave devices.
When the user reads the serial peripheral data I/O register, a buffer is actually being read. The first
SPIF must be cleared by the time a second transfer of data from the shift register to the read buffer
is initiated or an overrun condition will exist. In cases of overrun, the byte which causes the overrun
is lost.
A write to the serial peripheral data I/O register is not buffered and places data directly into the shift
register for transmission.
SERIAL PERIPHERAL INTERFACE
8-8
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