MC68HC08BD24 Datasheet, PDF (92/244 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Table 7-4. Interrupt Sources
Source
Flag
Mask¹
INT Register
Flag
Priority²
Vector Address
Reset
None
None
None
0
$FFFE–$FFFF
SWI Instruction
None
None
None
0
$FFFC–$FFFD
IRQ pin
IRQF
IMASK
IF1
1
$FFFA–$FFFB
Reserved
—
—
—
2
$FFF8–$FFF9
ALIF
DDC12AB
NAKIF
DIEN
RXIF
IF3
3
$FFF6–$FFF7
TXIF
SCLIF
SCLIEN
Reserved
—
—
—
4
$FFF4–$FFF5
TIM channel 0
CH0F
CH0IE
IF5
5
$FFF2–$FFF3
TIM channel 1
CH1F
CH1IE
IF6
6
$FFF0–$FFF1
TIM overflow
TOF
TOIE
IF7
7
$FFEE–$FFEF
Sync processor
VSIF
VSIE
IF8
LVSIF
LVSIE
8
$FFEC–$FFED
Reserved
—
—
—
9
$FFEA–FFEB
ADC conversion complete
COCO
AIEN
IF10
10
$FFE8–$FFE9
Reserved
—
—
—
—
$FFE6–$FFE7
1. The I bit in the condition code register is a global mask for all interrupts sources except the SWI instruction.
2. 0 = highest priority
Technical Data
92
MC68HC08BD24 — Rev. 1.1
Freescale Semiconductor