MC68HC08BD24 Datasheet, PDF(235/244 Page) Motorola, Inc – HCMOS Microcontroller Unit

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MC68HC08BD24 Datasheet, PDF (235/244 Pages) Motorola, Inc – HCMOS Microcontroller Unit

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Characteristic

Symbol

Min

Typ(2)

Max

Unit

NOTES:

1. VDD = 5.0 Vdc Â± 10%, VSS = 0 Vdc, TA = TL to TH, unless otherwise noted.

2. Typical values reflect average measurements at midpoint of voltage range, 25 Â°C only.

3. Run (operating) IDD measured using external square wave clock source. All inputs 0.2 V from rail. No dc loads. Less than 100 pF on all

outputs. CL = 15 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects run IDD. Measured with all modules

enabled.

4. Wait IDD measured using external square wave clock source (fOSCXCLK = 24MHz); all inputs 0.2 V from rail; no dc loads; less than 100 pF

on all outputs. CL = 15pF on OSC2; all ports configured as inputs; OSC2 capacitance linearly affects wait IDD.

5. STOP IDD measured with OSC1 grounded; no port pins sourcing current.

6. Maximum is highest voltage that POR is guaranteed.

7. If minimum VDD is not reached before the internal POR reset is released, RST must be driven low externally until minimum VDD is

reached.

19.7 Control Timing

Characteristic

Symbol

Min

Max

Unit

Internal Operating Frequency(2)

RST Input Pulse Width Low(3)

fOP

â

tIRL

50

6

MHz

â

ns

NOTES:

1. VDD = 5.0 Vdc Â± 10%, VSS = 0 Vdc; timing shown with respect to 20% VDD and 70% VDD, unless otherwise noted.

2. Some modules may require a minimum frequency greater than dc for proper operation; see appropriate table for this

information.

3. Minimum pulse width reset is guaranteed to be recognized. It is possible for a smaller pulse width to cause a reset.

19.8 Oscillator Characteristics

Characteristic

Symbol

Min

Typ

Crystal Frequency(1)

fOSCXCLK

â

24

External Clock

Reference Frequency(1), (2)

fOSCXCLK

dc

â

Crystal Load Capacitance(3)

Crystal Fixed Capacitance(3)

Crystal Tuning Capacitance(3)

CL

â

15

C1

â

2 Ã CL

C2

â

2 Ã CL

Feedback Bias Resistor

Series Resistor(3), (4)

RB

â

10

RS

â

â

NOTES:

1. The sync processor module is designed to function at fOSCXCLK = 24MHz.

The values given here are oscillator specifications.

2. No more than 10% duty cycle deviation from 50%

3. Consult crystal vendor data sheet

4. Not Required for high frequency crystals

MC68HC08BD24 â Rev. 1.1

Freescale Semiconductor

Max

â

24

â

â

â

â

â

Unit

MHz

MHz

pF

Mâ¦

Technical Data

235

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