MC68HC08BD24 Datasheet, PDF (170/244 Pages) Motorola, Inc – HCMOS Microcontroller Unit

14.2 Introduction
The Sync Processor is designed to detect and process sync signals
inside a digital monitor system — from separated Hsync and Vsync
inputs, or from composite sync inputs such as Sync-On-Green (SOG).
After detection and the necessary polarity correction and/or sync
separation, the corrected sync signals are sent out. The MCU can also
send commands to other monitor circuitry, such as for the geometry
correction and OSD, using the DDC12AB and/or the IIC communication
channels.
The block diagram of the Sync Processor is shown in Figure 14-1.
NOTE: All quoted timings in this section assume an internal bus frequency of
6 MHz.
14.3 Features
Features of the Sync Processor include the following:
• Polarity detector
• Horizontal frequency counter
• Vertical frequency counter
• Low vertical frequency indicator (40.7Hz)
• Polarity controlled HSYNCO and VSYNCO outputs:
– From separate Hsync and Vsync
– From composite sync on HSYNC or SOG input pin
– From internal selectable free running Hsync and Vsync pulses
• CLAMP pulse output to the external pre-amp chip
• Internal schmitt trigger on HSYNC, VSYNC, and SOG input pins
to improve noise immunity
Technical Data
170
MC68HC08BD24 — Rev. 1.1
Freescale Semiconductor