MC68HC08BD24 Datasheet, PDF (191/244 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Table 15-1. I/O Port Register Summary (Continued)
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Read: 0
$0006
Data Direction Register C
(DDRC)
Write:
Reset: 0
0
DDRC5 DDRC4 DDRC3 DDRC2 DDRC1
0
0
0
0
0
0
Read: 0
$0007
Data Direction Register D
(DDRD)
Write:
Reset: 0
DDRD6 DDRD5 DDRD4 DDRD3 DDRD2 DDRD1
0
0
0
0
0
0
Read: 0
0
0
0
0
$0008
Port E Data Register
(PTE)
Write:
PTE2 PTE1
Reset:
Unaffected by reset
Read: 0
0
0
0
0
$0009
Data Direction Register E
(DDRE)
Write:
DDRE2 DDRE1
Reset: 0
0
0
0
0
0
0
Read:
0
0
0
0
$001D
Configuration Register 0
(CONFIG0)
Write:
HSYNCOE
VSYNCOE
SOGE
Reset: 0
0
0
0
0
0
0
$0028
Read:
PWM Control Register 1
(PWMCR1)
Write:
Reset:
PWM7E
0
PWM6E
0
PWM5E
0
PWM4E
0
PWM3E
0
PWM2E
0
PWM1E
0
Read: 0
0
0
0
$0049
Port D Configuration
Register (PDCR)
Write:
CLAMPE DDCSCLE DDCDATE
Reset: 0
0
0
0
0
0
0
$0059
Read:
PWM Control Register 2
(PWMCR2)
Write:
PWM15E
Reset: 0
PWM14E
0
PWM13E
0
PWM12E
0
PWM11E
0
PWM10E
0
PWM9E
0
= Unimplemented
Bit 0
DDRC0
0
DDRD0
0
PTE0
DDRE0
0
0
0
PWM0E
0
0
0
PWM8E
0
MC68HC08BD24 — Rev. 1.1
Freescale Semiconductor
Technical Data
191