MC68HC08BD24 Datasheet, PDF (137/244 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Technical Data — MC68HC08BD24
Section 11. Pulse Width Modulator (PWM)
11.1 Contents
11.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
11.3 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .137
11.4 PWM Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
11.4.1 PWM Data Registers 0 to 15 (0PWM–15PWM). . . . . . . . . 140
11.4.2 PWM Control Registers 1 and 2 (PWMCR1:PWMCR2) . . 141
11.2 Introduction
Sixteen 8-bit PWM channels are available on the MC68HC08BD24.
Channels 0 to 7 are shared with port-B I/O pins under the control of the
PWM control register 1. Channels 8 to 15 are shared with port-A I/O pins
under the control of the PWM control register 2.
11.3 Functional Description
Each 8-bit PWM channel is composed of an 8-bit register which contains
a 5-bit PWM in MSB portion and a 3-bit binary rate multiplier (BRM) in
LSB portion. There are 16 PWM data registers as shown in Table 11-1.
The value programmed in the 5-bit PWM portion will determine the pulse
length of the output. The clock to the 5-bit PWM portion is the system
clock, the repetition rate of the output is hence 187.5KHz at 6MHz clock.
The 3-bit BRM will generate a number of narrow pulses which are
equally distributed among an 8-PWM-cycle frame. The number of pulses
generated is equal to the number programmed in the 3-bit BRM portion.
Examples of the waveforms are shown in Figure 11-3.
MC68HC08BD24 — Rev. 1.1
Freescale Semiconductor
Technical Data
137