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| MC68HC08BD24 Datasheet, PDF (173/244 Pages) Motorola, Inc – HCMOS Microcontroller Unit | |||
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14.5 Functional Blocks
VSYNC
EXTRACTED
VSYNC
A1
BS
SVF
A1
BS
VINVO
COMP
SOUT
POLARITY DETECT
VPOL
ONE SHOT
VFLR
VSIF
VSIE
EDGE DETECT
VFHR
VEDGE
VOF
INTERNAL (6MHz)
BUS CLOCK
÷ 48 (125kHz)
13-BIT COUNTER
$C00 DETECT
OVERFLOW DETECT
LVSIF
LVSIE
VSYNCO
TO INTERRUPT
LOGIC
HSYNC
SOG
2µs
CLK32/32.768
A1
BS
ONE SHOT
HFLR
HFHR
HOVER
13-BIT COUNTER
OVERFLOW DETECT
SOGSEL
POLARITY DETECT
VPOL
A1
BS
HPOL
VSYNC EXTRACTOR
COMP
EXTRACTED VSYNC
H/V SYNC
PULSE GENERATOR
SVF
SHF
B
A1 S
BPOR
COINV
CLAMP
PULSE GENERATOR
CLAMP
HVOCR[2:0]
SOUT
HINVO
Figure 14-1. Sync Processor Block Diagram
HSYNCO
MC68HC08BD24 â Rev. 1.1
Freescale Semiconductor
Technical Data
173
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