MC68HC08BD24 Datasheet, PDF (44/244 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Addr.
Register Name
Read:
$005A
Unimplemented Write:
Reset:
Read:
$005B
Unimplemented Write:
Reset:
Read:
$005C
Unimplemented Write:
Reset:
$005D
Read:
ADC Status and Control
Register (ADSCR)
Write:
Reset:
$005E
Read:
ADC Data Register
(ADR)
Write:
Reset:
Read:
$005F
ADC Input Clock Register
(ADICLK)
Write:
Reset:
Bit 7
COCO
0
AD7
ADIV2
0
6
AIEN
0
AD6
ADIV1
0
5
4
3
2
1
Bit 0
ADCO ADCH4 ADCH3 ADCH2 ADCH1 ADCH0
0
1
1
1
1
1
AD5
AD4
AD3
AD2
AD1
AD0
Unaffected after Reset
0
0
0
0
0
ADIV0
0
0
0
0
0
0
Read:
SBSW
$FE00
SIM
Break
Status
Register
(SBSR)
Write:
R
R
R
R
R
R
R
Note
Reset: 0
0
0
0
0
0
0
0
Note: Writing a logic 0 clears SBSW.
Read: POR
PIN
COP
ILOP
ILAD
0
0
0
$FE01
SIM
Reset
Status
Register
(SRSR)
Write:
POR: 1
0
0
0
0
0
0
0
$FE02
Read:
R
R
R
R
R
R
R
R
Reserved Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 10 of 12)
Technical Data
44
MC68HC08BD24 — Rev. 1.1
Freescale Semiconductor