MC68HC08BD24 Datasheet, PDF (153/244 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Technical Data — MC68HC08BD24
Section 13. DDC12AB Interface
13.1 Contents
13.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
13.3 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
13.4 I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
13.5 DDC Protocols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
13.6 Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .156
13.6.1 DDC Address Register (DADR) . . . . . . . . . . . . . . . . . . . . . 156
13.6.2 DDC2 Address Register (D2ADR) . . . . . . . . . . . . . . . . . . . 157
13.6.3 DDC Control Register (DCR) . . . . . . . . . . . . . . . . . . . . . . . 158
13.6.4 DDC Master Control Register (DMCR) . . . . . . . . . . . . . . . 159
13.6.5 DDC Status Register (DSR) . . . . . . . . . . . . . . . . . . . . . . . . 162
13.6.6 DDC Data Transmit Register (DDTR) . . . . . . . . . . . . . . . . 164
13.6.7 DDC Data Receive Register (DDRR) . . . . . . . . . . . . . . . . . 165
13.7 Programming Considerations . . . . . . . . . . . . . . . . . . . . . . . . . 166
13.2 Introduction
This DDC12AB Interface module is used by the digital monitor to show
its identification information to the video controller. It contains DDC1
hardware and a two-wire, bidirectional serial bus which is fully
compatible with multi-master IIC bus protocol to support DDC2AB
interface.
This module not only can be applied in internal communications, but can
also be used as a typical command reception serial bus for factory setup
and alignment purposes. It also provides the flexibility of hooking
additional devices to an existing system for future expansion without
adding extra hardware.
MC68HC08BD24 — Rev. 1.1
Freescale Semiconductor
Technical Data
153