MC68HC08BD24 Datasheet, PDF (190/244 Pages) Motorola, Inc – HCMOS Microcontroller Unit

15.2 Introduction
Thirty-two (32) bidirectional input-output (I/O) pins form four parallel
ports. All I/O pins are programmable as inputs or outputs.
NOTE:
Connect any unused I/O pins to an appropriate logic level, either V_DD or
V_SS. Although the I/O ports do not require termination for proper
operation, termination reduces excess current consumption and the
possibility of electrostatic damage.
Table 15-1. I/O Port Register Summary
Addr.
Register Name
Bit 7
6
5
4
3
$0000
Read:
Port A Data Register
(PTA)
Write:
Reset:
PTA7
PTA6 PTA5 PTA4 PTA3
Unaffected by reset
$0001
Read:
Port B Data Register
(PTB)
Write:
Reset:
PTB7
PTB6 PTB5 PTB4 PTB3
Unaffected by reset
$0002
Read: 0
Port C Data Register
(PTC)
Write:
Reset:
0
PTC5 PTC4 PTC3
Unaffected by reset
$0003
Read: 0
Port D Data Register
(PTD)
Write:
Reset:
Read:
$0004
Data Direction Register A
(DDRA)
Write:
Reset:
DDRA7
0
PTD6
DDRA6
0
PTD5
DDRA5
0
PTD4 PTD3
Unaffected by reset
DDRA4 DDRA3
0
0
Read:
$0005
Data Direction Register B
(DDRB)
Write:
Reset:
DDRB7
0
DDRB6
0
DDRB5
0
= Unimplemented
DDRB4
0
DDRB3
0
2
PTA2
PTB2
PTC2
PTD2
DDRA2
0
DDRB2
0
1
PTA1
PTB1
PTC1
PTD1
DDRA1
0
DDRB1
0
Bit 0
PTA0
PTB0
PTC0
PTD0
DDRA0
0
DDRB0
0
Technical Data
190
MC68HC08BD24 — Rev. 1.1
Freescale Semiconductor