MC68HC08BD24 Datasheet, PDF (200/244 Pages) Motorola, Inc – HCMOS Microcontroller Unit

15.5.2 Data Direction Register C
Data direction register C (DDRC) determines whether each port C pin is
an input or an output. Writing a logic 1 to a DDRC bit enables the output
buffer for the corresponding port C pin; a logic 0 disables the output
buffer.
Address:
Read:
Write:
Reset:
$0006
Bit 7
0
6
5
4
3
2
1
DDRC6 DDRC5 DDRC4 DDRC3 DDRC2 DDRC1
0
0
0
0
0
0
0
= Unimplemented
Figure 15-10. Data Direction Register C (DDRC)
Bit 0
DDRC0
0
DDRC6–DDRC0 — Data Direction Register C Bits
These read/write bits control port C data direction. Reset clears
DDRC6–DDRC0, configuring all port C pins as inputs.
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
NOTE: Avoid glitches on port C pins by writing to the port C data register before
changing data direction register C bits from 0 to 1.
Figure 15-11 shows the port C I/O logic.
READ DDRC ($0006)
WRITE DDRC ($0006)
RESET
WRITE PTC ($0002)
DDRCx
PTCx
PTCx
READ PTC ($0002)
Technical Data
200
Figure 15-11. Port C I/O Circuit
MC68HC08BD24 — Rev. 1.1
Freescale Semiconductor