MC68HC08BD24 Datasheet, PDF (201/244 Pages) Motorola, Inc – HCMOS Microcontroller Unit

When bit DDRCx is a logic 1, reading address $0002 reads the PTCx
data latch. When bit DDRCx is a logic 0, reading address $0002 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 15-5 summarizes
the operation of the port C pins.
Table 15-5. Port C Pin Functions
PTCPUE Bit
0
DDRC Bit
0
PTC Bit
X
I/O Pin Mode
Input, Hi-Z⁽²⁾
Accesses to DDRC
Read/Write
DDRC6–DDRC0
Accesses to PTC
Read
Pin
Write
PTC6–PTC0⁽³⁾
X
1
X
Output
DDRC6–DDRC0 PTC6–PTC0 PTC6–PTC0
Notes:
1. X = Don’t care
2. Hi-Z = High impedance
3. Writing affects data register, but does not affect input.
15.5.3 Port C Options
The ADCH4–ADCH0 bits in the ADC Status and Control Register
(ADSCR) defines which PTCx/ADCx pin is used as an ADC input and
overrides any control from the port I/O logic by forcing that pin as the
input to the analog circuitry. See 12.8.1 ADC Status and Control
Register.
MC68HC08BD24 — Rev. 1.1
Freescale Semiconductor
Technical Data
201