MC68HC08BD24 Datasheet, PDF (144/244 Pages) Motorola, Inc – HCMOS Microcontroller Unit

12.3 Features
Features of the ADC module include:
• 6 Channels ADC with Multiplexed Input
• Linear Successive Approximation
• 8-Bit Resolution
• Single or Continuous Conversion
• Conversion Complete Flag or Conversion Complete Interrupt
• Selectable ADC Clock
Table 12-1. ADC Register Summary
Addr. Register Name
Bit 7
6
5
4
3
2
$005D ^{ADC Status and Control}
Register
(ADSCR)
Read:
Write:
Reset:
COCO
0
$005E
Read: AD7
ADC Data Register
(ADR)
Write:
Reset:
$005F
ADC Input Clock
Register
(ADICLK)
Read:
Write:
Reset:
ADIV2
0
AIEN
0
AD6
ADIV1
0
ADCO ADCH4 ADCH3 ADCH2
0
1
1
1
AD5
AD4
AD3
AD2
Indeterminate after Reset
0
0
0
ADIV0
0
0
0
0
= Unimplemented
1
ADCH1
1
AD1
0
0
Bit 0
ADCH0
1
AD0
0
0
12.4 Functional Description
Four ADC channels are available for sampling external sources at pins
PTC5–PTC0. An analog multiplexer allows the single ADC converter to
select one of the 6 ADC channels as ADC voltage input (ADCVIN).
ADCVIN is converted by the successive approximation register-based
counters. The ADC resolution is 8 bits. When the conversion is
completed, ADC puts the result in the ADC data register and sets a flag
or generates an interrupt. Figure 12-1 shows a block diagram of the
ADC.
Technical Data
144
MC68HC08BD24 — Rev. 1.1
Freescale Semiconductor