MC68HC08BD24 Datasheet, PDF (150/244 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Table 12-2. MUX Channel Select
ADCH4 ADCH3 ADCH2 ADCH1 ADCH0 ADC Channel
Input Select
0
0
0
0
0
ADC0
0
0
0
0
1
ADC1
0
0
0
1
0
ADC2
PTC0
PTC1
PTC2
0
0
0
1
1
ADC3
0
0
1
0
0
ADC4
0
0
1
0
1
ADC5
0
0
1
1
0
:
:
:
:
:
—
1
1
0
1
0
1
1
0
1
1
—
1
1
1
0
0
—
PTC3
PTC4
PTC5
Unused
(see Note 1)
Reserved
Unused
1
1
1
0
1
1
1
1
1
0
1
1
1
1
1
V_DDA (see Note 2)
V_SSA (see Note 2)
ADC power off
NOTES:
1. If any unused channels are selected, the resulting ADC conversion will be unknown.
2. The voltage levels supplied from internal reference nodes as specified in the table are used to verify the
operation of the ADC converter both in production test and for user applications.
12.8.2 ADC Data Register
One 8-bit result register is provided. This register is updated each time
an ADC conversion completes.
Address: $005E
Bit 7
6
5
4
3
2
1
Bit 0
Read: AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
Write:
Reset:
Indeterminate after Reset
= Unimplemented
Figure 12-3. ADC Data Register (ADR)
Technical Data
150
MC68HC08BD24 — Rev. 1.1
Freescale Semiconductor