AMIC110 Datasheet, PDF (67/214 Pages) Texas Instruments – Sitara Processors

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AMIC110
SPRS971A – AUGUST 2016 – REVISED SEPTEMBER 2016
5 Specifications
5.1 Absolute Maximum Ratings
NOTE
• The LCD module is not supported for this family of devices, but the "LCD" name is still
present in some supply voltage or PLL names.
• The ZCE package is not supported for this family of devices.
over junction temperature range (unless otherwise noted)⁽¹⁾⁽²⁾
VDD_MPU⁽³⁾
Supply voltage for the MPU core domain
MIN
MAX
UNIT
–0.5
1.5
V
VDD_CORE
CAP_VDD_RTC⁽⁴⁾
VPP⁽⁵⁾
Supply voltage for the core domain
Supply voltage for the RTC core domain
Supply voltage for the FUSE ROM domain
–0.5
1.5
V
–0.5
1.5
V
–0.5
2.2
V
VDDS_RTC
Supply voltage for the RTC domain
–0.5
2.1
V
VDDS_OSC
Supply voltage for the System oscillator
–0.5
2.1
V
VDDS_SRAM_CORE_BG Supply voltage for the Core SRAM LDOs
–0.5
2.1
V
VDDS_SRAM_MPU_BB Supply voltage for the MPU SRAM LDOs
–0.5
2.1
V
VDDS_PLL_DDR
Supply voltage for the DPLL DDR
–0.5
2.1
V
VDDS_PLL_CORE_LCD Supply voltage for the DPLL Core and LCD
–0.5
2.1
V
VDDS_PLL_MPU
Supply voltage for the DPLL MPU
–0.5
2.1
V
VDDS_DDR
Supply voltage for the DDR I/O domain
–0.5
2.1
V
VDDS
Supply voltage for all dual-voltage I/O domains
–0.5
2.1
V
VDDA1P8V_USB0
VDDA1P8V_USB1⁽⁶⁾
Supply voltage for USBPHY
Supply voltage for USBPHY
–0.5
2.1
V
–0.5
2.1
V
VDDA_ADC
Supply voltage for ADC
–0.5
2.1
V
VDDSHV1
VDDSHV2⁽⁶⁾
VDDSHV3⁽⁶⁾
Supply voltage for the dual-voltage I/O domain
Supply voltage for the dual-voltage I/O domain
Supply voltage for the dual-voltage I/O domain
–0.5
3.8
V
–0.5
3.8
V
–0.5
3.8
V
VDDSHV4
Supply voltage for the dual-voltage I/O domain
–0.5
3.8
V
VDDSHV5
Supply voltage for the dual-voltage I/O domain
–0.5
3.8
V
VDDSHV6
Supply voltage for the dual-voltage I/O domain
–0.5
3.8
V
VDDA3P3V_USB0
VDDA3P3V_USB1⁽⁶⁾
USB0_VBUS⁽⁷⁾
USB1_VBUS⁽⁶⁾⁽⁷⁾
Supply voltage for USBPHY
Supply voltage for USBPHY
Supply voltage for USB VBUS comparator input
Supply voltage for USB VBUS comparator input
–0.5
4
V
–0.5
4
V
–0.5
5.25
V
–0.5
5.25
V
DDR_VREF
Supply voltage for the DDR SSTL and HSTL reference voltage
–0.3
1.1
V
Steady state max voltage
at all I/O pins⁽⁸⁾
USB0_ID⁽⁹⁾
USB1_ID⁽⁶⁾⁽⁹⁾
Steady state maximum voltage for the USB ID input
Steady state maximum voltage for the USB ID input
–0.5 V to I/O supply voltage + 0.3 V
–0.5
2.1
V
–0.5
2.1
V
Transient overshoot and
undershoot specification at
I/O terminal
25% of corresponding I/O supply
voltage for up to 30% of signal
period
Storage temperature,
T_stg(11)
–55
155
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to their associated VSS or VSSA_x.
(3) Not available on the ZCE package. VDD_MPU is merged with VDD_CORE on the ZCE package.
(4) This supply is sourced from an internal LDO when RTC_KALDO_ENn is low. If RTC_KALDO_ENn is high, this supply must be sourced
from an external power supply.
(5) During functional operation, this pin is a no connect.
Copyright © 2016, Texas Instruments Incorporated
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Specifications
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