AMIC110 Datasheet, PDF (16/214 Pages) Texas Instruments – Sitara Processors

AMIC110
SPRS971A – AUGUST 2016 – REVISED SEPTEMBER 2016
www.ti.com
ZCZ BALL
NUMBER [1]
PIN NAME [2]
C4
DDR_BA0
E1
DDR_BA1
B3
DDR_BA2
F1
DDR_CASn
D2
DDR_CK
G3
DDR_CKE
D1
DDR_CKn
H2
DDR_CSn0
M3
DDR_D0
M4
DDR_D1
N1
DDR_D2
N2
DDR_D3
N3
DDR_D4
N4
DDR_D5
P3
DDR_D6
P4
DDR_D7
J1
DDR_D8
K1
DDR_D9
K2
DDR_D10
K3
DDR_D11
K4
DDR_D12
L3
DDR_D13
L4
DDR_D14
ddr_ba0
ddr_ba1
ddr_ba2
ddr_casn
ddr_ck
ddr_cke
ddr_nck
ddr_csn0
ddr_d0
ddr_d1
ddr_d2
ddr_d3
ddr_d4
ddr_d5
ddr_d6
ddr_d7
ddr_d8
ddr_d9
ddr_d10
ddr_d11
ddr_d12
ddr_d13
ddr_d14
Table 4-4. Pin Attributes (ZCZ Package) (continued)
SIGNAL NAME [3]
MODE [4]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TYPE [5]
BALL RESET
STATE [6]
BALL RESET
REL. STATE
[7]
RESET REL.
MODE [8]
ZCZ POWER [9] HYS [10]
BUFFER
STRENGTH
(mA) [11]
O
H
1
0
VDDS_DDR NA
8
O
H
1
0
VDDS_DDR NA
8
O
H
1
0
VDDS_DDR NA
8
O
H
1
0
VDDS_DDR NA
8
O
L
0
0
VDDS_DDR NA
8
O
L
0
0
VDDS_DDR NA
8
O
H
1
0
VDDS_DDR NA
8
O
H
1
0
VDDS_DDR NA
8
I/O
L
Z
0
VDDS_DDR Yes
8
I/O
L
Z
0
VDDS_DDR Yes
8
I/O
L
Z
0
VDDS_DDR Yes
8
I/O
L
Z
0
VDDS_DDR Yes
8
I/O
L
Z
0
VDDS_DDR Yes
8
I/O
L
Z
0
VDDS_DDR Yes
8
I/O
L
Z
0
VDDS_DDR Yes
8
I/O
L
Z
0
VDDS_DDR Yes
8
I/O
L
Z
0
VDDS_DDR Yes
8
I/O
L
Z
0
VDDS_DDR Yes
8
I/O
L
Z
0
VDDS_DDR Yes
8
I/O
L
Z
0
VDDS_DDR Yes
8
I/O
L
Z
0
VDDS_DDR Yes
8
I/O
L
Z
0
VDDS_DDR Yes
8
I/O
L
Z
0
VDDS_DDR Yes
8
PULLUP
/DOWN TYPE
[12]
I/O CELL [13]
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
16
Terminal Configuration and Functions
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