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AMIC110 Datasheet, PDF (136/214 Pages) Texas Instruments – Sitara Processors
AMIC110
SPRS971A – AUGUST 2016 – REVISED SEPTEMBER 2016
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7.7.2.1.2.4 Placement
Figure 7-20 shows the required placement for the LPDDR devices. The dimensions for this figure are
defined in Table 7-20. The placement does not restrict the side of the PCB on which the devices are
mounted. The ultimate purpose of the placement is to limit the maximum trace lengths and allow for
proper routing space. For single-memory LPDDR systems, the second LPDDR device is omitted from the
placement.
X
A1
Y
OFFSET
Y
LPDDR
Device
Y
OFFSET
A1
AMIC110
Recommended LPDDR
Device Orientation
Copyright © 2016, Texas Instruments Incorporated
Figure 7-20. AMIC110 Device and LPDDR Device Placement
Table 7-20. Placement Specifications(1)
NO.
PARAMETER
1 X(2)(3)
2 Y(2)(3)
3 Y Offset(2)(3)(4)
4 Clearance from non-LPDDR signal to LPDDR keepout region(5)(6)
MIN
MAX UNIT
1750 mils
1280 mils
650 mils
4
w
(1) LPDDR keepout region to encompass entire LPDDR routing area.
(2) For dimension definitions, see Figure 7-20.
(3) Measurements from center of the AMIC110 device to center of LPDDR device.
(4) For single-memory systems, TI recommends that Y offset be as small as possible.
(5) w is defined as the signal trace width.
(6) Non-LPDDR signals allowed within LPDDR keepout region provided they are separated from LPDDR routing layers by a ground plane.
136 Peripheral Information and Timings
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