AMIC110 Datasheet, PDF (56/214 Pages) Texas Instruments – Sitara Processors

AMIC110
SPRS971A – AUGUST 2016 – REVISED SEPTEMBER 2016
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Table 4-31. PRU-ICSS/MII0 Signals Description (continued)
SIGNAL NAME [1]
pr1_mii0_txd1
pr1_mii0_txd2
pr1_mii0_txd3
pr1_mii0_txen
pr1_mii_mr0_clk
pr1_mii_mt0_clk
DESCRIPTION [2]
MII Transmit Data bit 1
MII Transmit Data bit 2
MII Transmit Data bit 3
MII Transmit Enable
MII Receive Clock
MII Transmit Clock
TYPE [3]
ZCZ BALL [4]
O
R12, T1
O
R4, T12
O
R3, U12
O
R2, T11
I
V4
I
R1, U10
SIGNAL NAME [1]
pr1_mii1_col
pr1_mii1_crs
pr1_mii1_rxd0
pr1_mii1_rxd1
pr1_mii1_rxd2
pr1_mii1_rxd3
pr1_mii1_rxdv
pr1_mii1_rxer
pr1_mii1_rxlink
pr1_mii1_txd0
pr1_mii1_txd1
pr1_mii1_txd2
pr1_mii1_txd3
pr1_mii1_txen
pr1_mii_mr1_clk
pr1_mii_mt1_clk
Table 4-32. PRU-ICSS/MII1 Signals Description
DESCRIPTION [2]
MII Collision Detect
MII Carrier Sense
MII Receive Data bit 0
MII Receive Data bit 1
MII Receive Data bit 2
MII Receive Data bit 3
MII Receive Data Valid
MII Receive Data Error
MII Receive Link
MII Transmit Data bit 0
MII Transmit Data bit 1
MII Transmit Data bit 2
MII Transmit Data bit 3
MII Transmit Enable
MII Receive Clock
MII Transmit Clock
TYPE [3]
ZCZ BALL [4]
I
T17
I
R6, V12
I
V16
I
T15
I
U15
I
V15
I
T16
I
V17
I
U18
O
R14
O
T14
O
U14
O
V14
O
U17
I
U16
I
R13
SIGNAL NAME [1]
pr1_uart0_cts_n
pr1_uart0_rts_n
pr1_uart0_rxd
pr1_uart0_txd
Table 4-33. PRU-ICSS/UART0 Signals Description
DESCRIPTION [2]
UART Clear to Send
UART Request to Send
UART Receive Data
UART Transmit Data
TYPE [3]
ZCZ BALL [4]
I
A17, D18
O
B17, D17
I
B16, D16
O
A16, D15
56
Terminal Configuration and Functions
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