AMIC110 Datasheet, PDF (148/214 Pages) Texas Instruments – Sitara Processors

AMIC110
SPRS971A – AUGUST 2016 – REVISED SEPTEMBER 2016
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7.7.2.2.2.5 DDR2 Keepout Region
The region of the PCB used for the DDR2 circuitry must be isolated from other signals. The DDR2
keepout region is defined for this purpose and is shown in Figure 7-28. This region should encompass all
DDR2 circuitry and the region size varies with component placement and DDR2 routing. Additional
clearances required for the keepout region are shown in Table 7-32. Non-DDR2 signals must not be
routed on the same signal layer as DDR2 signals within the DDR2 keepout region. Non-DDR2 signals
may be routed in the region provided they are routed on layers separated from DDR2 signal layers by a
ground layer. No breaks should be allowed in the reference ground or VDDS_DDR power plane in this
region. In addition, the VDDS_DDR power plane should cover the entire keepout region.
A1
DDR2
Device
A1
Figure 7-28. DDR2 Keepout Region
7.7.2.2.2.6 Bulk Bypass Capacitors
Bulk bypass capacitors are required for moderate speed bypassing of the DDR2 and other circuitry.
Table 7-33 contains the minimum numbers and capacitance required for the bulk bypass capacitors. Note
that this table only covers the bypass needs of the AMIC110 DDR2 interface and DDR2 devices.
Additional bulk bypass capacitance may be needed for other circuitry.
Table 7-33. Bulk Bypass Capacitors⁽¹⁾
NO.
PARAMETER
MIN
MAX UNIT
1 AMIC110 VDDS_DDR bulk bypass capacitor count
1
devices
2 AMIC110 VDDS_DDR bulk bypass total capacitance
10
μF
3 DDR2 number 1 bulk bypass capacitor count
1
devices
4 DDR2 number 1 bulk bypass total capacitance
5 DDR2 number 2 bulk bypass capacitor count⁽²⁾
6 DDR2 number 2 bulk bypass total capacitance⁽²⁾
10
μF
1
devices
10
μF
(1) These devices should be placed near the device they are bypassing, but preference should be given to the placement of the high-speed
(HS) bypass capacitors.
(2) Only used when two DDR2 devices are used.
148 Peripheral Information and Timings
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