AMIC110 Datasheet, PDF (17/214 Pages) Texas Instruments – Sitara Processors

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AMIC110
SPRS971A – AUGUST 2016 – REVISED SEPTEMBER 2016
ZCZ BALL
NUMBER [1]
PIN NAME [2]
M1
DDR_D15
M2
DDR_DQM0
J2
DDR_DQM1
P1
DDR_DQS0
L1
DDR_DQS1
P2
DDR_DQSn0
L2
DDR_DQSn1
G1
DDR_ODT
G4
DDR_RASn
G2
DDR_RESETn
J4
DDR_VREF
J3
DDR_VTP
B2
DDR_WEn
C18
ECAP0_IN_PWM0_OUT
C14
EMU0
B14
EMU1
B18
EXTINTn
C5
EXT_WAKEUP
Table 4-4. Pin Attributes (ZCZ Package) (continued)
SIGNAL NAME [3]
ddr_d15
ddr_dqm0
ddr_dqm1
ddr_dqs0
ddr_dqs1
ddr_dqsn0
ddr_dqsn1
ddr_odt
ddr_rasn
ddr_resetn
ddr_vref
ddr_vtp
ddr_wen
eCAP0_in_PWM0_out ⁽¹⁵⁾
uart3_txd
spi1_cs1
pr1_ecap0_ecap_capin_apwm_o
spi1_sclk
mmc0_sdwp
xdma_event_intr2
gpio0_7
EMU0
gpio3_7
EMU1
gpio3_8
nNMI
EXT_WAKEUP
MODE [4]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
2
3
4
5
6
7
0
7
0
7
0
0
TYPE [5]
BALL RESET
STATE [6]
BALL RESET
REL. STATE
[7]
RESET REL.
MODE [8]
ZCZ POWER [9] HYS [10]
BUFFER
STRENGTH
(mA) [11]
I/O
L
Z
0
VDDS_DDR Yes
8
O
H
1
0
VDDS_DDR NA
8
O
H
1
0
VDDS_DDR NA
8
I/O
L
Z
0
VDDS_DDR Yes
8
I/O
L
Z
0
VDDS_DDR Yes
8
I/O
H
Z
0
VDDS_DDR Yes
8
I/O
H
Z
0
VDDS_DDR Yes
8
O
L
0
0
VDDS_DDR NA
8
O
H
1
0
VDDS_DDR NA
8
O
L
0
0
VDDS_DDR NA
8
A ⁽¹⁹⁾
NA
NA
NA
VDDS_DDR NA
NA
I ⁽²⁰⁾
NA
NA
NA
VDDS_DDR NA
NA
O
H
1
0
VDDS_DDR NA
8
I/O
Z
L
7
VDDSHV6
Yes
4
O
I/O
I/O
I/O
I
I
I/O
I/O
H
H
0
VDDSHV6
Yes
6
I/O
I/O
H
H
0
VDDSHV6
Yes
6
I/O
I
Z
H
0
VDDSHV6
Yes
NA
I
L
Z
0
VDDS_RTC
Yes
NA
PULLUP
/DOWN TYPE
[12]
I/O CELL [13]
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS/SSTL/
HSTL
NA
Analog
NA
Analog
PU/PD
LVCMOS/SSTL/
HSTL
PU/PD
LVCMOS
PU/PD
PU/PD
PU/PD
NA
LVCMOS
LVCMOS
LVCMOS
LVCMOS
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Terminal Configuration and Functions
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