AMIC110 Datasheet, PDF (183/214 Pages) Texas Instruments – Sitara Processors

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SPI_CS[x] (In)
PHA=0
EPOL=1
SPI_SCLK (In) ^POL=0
SPI_SCLK (In)
POL=1
SPI_D[x] (SIMO, In)
AMIC110
SPRS971A – AUGUST 2016 – REVISED SEPTEMBER 2016
8
4
5
Bit n-1
4
5
Bit n-2
1
3
2
1
3
2
Bit n-3
Bit n-4
9
Bit 0
SPI_CS[x] (In)
PHA=1
EPOL=1
SPI_SCLK (In) ^POL=0
SPI_SCLK (In)
POL=1
SPI_D[x] (SIMO, In)
8
4
5
Bit n-1
1
3
2
1
2
3
4
5
Bit n-2
Bit n-3
Bit 1
9
Bit 0
Figure 7-59. SPI Slave Mode Receive Timing
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Peripheral Information and Timings 183