AMIC110 Datasheet, PDF (180/214 Pages) Texas Instruments – Sitara Processors

AMIC110
SPRS971A – AUGUST 2016 – REVISED SEPTEMBER 2016
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Table 7-60. Switching Characteristics for McASP⁽¹⁾
(see Figure 7-58)
NO.
PARAMETER
OPP100
MIN MAX
9 t_c(AHCLKRX)
Cycle time, McASP[x]_AHCLKR and
McASP[x]_AHCLKX
20⁽²⁾
10 t_w(AHCLKRX)
Pulse duration, McASP[x]_AHCLKR and
McASP[x]_AHCLKX high or low
0.5P – 2.5⁽³⁾
11 t_c(ACLKRX)
Cycle time, McASP[x]_ACLKR and
McASP[x]_ACLKX
20
12 t_w(ACLKRX)
Pulse duration, McASP[x]_ACLKR and
McASP[x]_ACLKX high or low
0.5P – 2.5⁽³⁾
13 t_{d(ACLKRX-AFSRX)}
Delay time, McASP[x]_ACLKR and
McASP[x]_ACLKX transmit edge to
McASP[x]_AFSR and
McASP[x]_AFSX output valid
Delay time, McASP[x]_ACLKR and
McASP[x]_ACLKX transmit edge to
McASP[x]_AFSR and
McASP[x]_AFSX output valid with
Pad Loopback
ACLKR and
ACLKX int
ACLKR and
ACLKX ext in
ACLKR and
ACLKX ext
out
0
6
2 13.5
2 13.5
14 t_d(ACLKX-AXR)
Delay time, McASP[x]_ACLKX
transmit edge to McASP[x]_AXR
output valid
Delay time, McASP[x]_ACLKX
transmit edge to McASP[x]_AXR
output valid with Pad Loopback
ACLKX int
ACLKX ext in
ACLKX ext
out
0
6
2 13.5
2 13.5
15 t_{dis(ACLKX-AXR)}
Disable time, McASP[x]_ACLKX
transmit edge to McASP[x]_AXR
output high impedance
Disable time, McASP[x]_ACLKX
transmit edge to McASP[x]_AXR
output high impedance with pad
loopback
ACLKX int
ACLKX ext in
ACLKX ext
out
0
6
2 13.5
2 13.5
(1) ACLKR internal: ACLKRCTL.CLKRM = 1, PDIR.ACLKR = 1
ACLKR external input: ACLKRCTL.CLKRM = 0, PDIR.ACLKR = 0
ACLKR external output: ACLKRCTL.CLKRM = 0, PDIR.ACLKR = 1
ACLKX internal: ACLKXCTL.CLKXM = 1, PDIR.ACLKX = 1
ACLKX external input: ACLKXCTL.CLKXM = 0, PDIR.ACLKX = 0
ACLKX external output: ACLKXCTL.CLKXM = 0, PDIR.ACLKX = 1
(2) 50 MHz
(3) P = AHCLKR and AHCLKX period.
OPP50
MIN
40
0.5P – 2.5⁽³⁾
40
0.5P – 2.5⁽³⁾
0
2
2
0
2
2
0
2
2
MAX
6
18
18
6
18
18
6
18
18
UNIT
ns
ns
ns
ns
ns
ns
ns
180 Peripheral Information and Timings
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