AMIC110 Datasheet, PDF (151/214 Pages) Texas Instruments – Sitara Processors

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AMIC110
SPRS971A – AUGUST 2016 – REVISED SEPTEMBER 2016
7.7.2.2.2.10 DDR_VREF Routing
DDR_VREF is used as a reference by the input buffers of the DDR2 memories as well as the AMIC110
device. DDR_VREF is intended to be half the DDR2 power supply voltage and should be created using a
resistive divider as shown in Figure 7-25 and Figure 7-26. TI does not recommend other methods of
creating DDR_VREF. Figure 7-29 shows the layout guidelines for DDR_VREF.
DDR2 Device
DDR_VREF Nominal Minimum
Trace Width is 20 Mils
DDR_VREF Bypass Capacitor
A1
AMIC110
A1
Neck down to minimum in BGA escape
regions is acceptable. Narrowing to
accommodate via congestion for short
distances is also acceptable. Best
performance is obtained if the width
of DDR_VREF is maximized.
Copyright © 2016, Texas Instruments Incorporated
Figure 7-29. DDR_VREF Routing and Topology
Copyright © 2016, Texas Instruments Incorporated
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