AMIC110 Datasheet, PDF (39/214 Pages) Texas Instruments – Sitara Processors

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AMIC110
SPRS971A – AUGUST 2016 – REVISED SEPTEMBER 2016
ZCZ BALL
NUMBER [1]
PIN NAME [2]
R10
VDDS_PLL_CORE_LCD
E7
VDDS_PLL_DDR
H15
VDDS_PLL_MPU
D7
VDDS_RTC
E9
VDDS_SRAM_CORE_BG
D10
VDDS_SRAM_MPU_BB
F6, F7, G6, VDD_CORE
G7, G10, H11,
J12, K6, K8,
K12, L6, L7,
L8, L9, M11,
M13, N8, N9,
N12, N13
F10, F11,
VDD_MPU
F12, F13,
G13, H13, J13
A2
VDD_MPU_MON
M5
VPP
A9
VREFN
B9
VREFP
A1, A18, F8, VSS
G8, G9, G11,
G12, H6, H7,
H8, H9, H10,
H12, J6, J7,
J8, J9, J10,
J11, K7, K9,
K10, K11,
L10, L11, L12,
L13, M6, M7,
M8, M9, M10,
M12, N7, N10,
N11, V1, V18
E8
VSSA_ADC
M14, N14 VSSA_USB
V11
VSS_OSC
A5
VSS_RTC
A10
WARMRSTn
A15
XDMA_EVENT_INTR0
Table 4-4. Pin Attributes (ZCZ Package) (continued)
SIGNAL NAME [3]
VDDS_PLL_CORE_LCD
VDDS_PLL_DDR
VDDS_PLL_MPU
VDDS_RTC
VDDS_SRAM_CORE_BG
VDDS_SRAM_MPU_BB
VDD_CORE
MODE [4]
NA
NA
NA
NA
NA
NA
NA
TYPE [5]
BALL RESET
STATE [6]
BALL RESET
REL. STATE
[7]
RESET REL.
MODE [8]
ZCZ POWER [9] HYS [10]
PWR
PWR
PWR
PWR
PWR
PWR
PWR
BUFFER
STRENGTH
(mA) [11]
PULLUP
/DOWN TYPE
[12]
I/O CELL [13]
VDD_MPU
VDD_MPU_MON ⁽³¹⁾
VPP
VREFN
VREFP
VSS
NA
PWR
NA
A
NA
PWR
0
AP
Z
Z
0
VDDA_ADC
NA
NA
NA
Analog
0
AP
Z
Z
0
VDDA_ADC
NA
NA
NA
Analog
NA
GND
VSSA_ADC
VSSA_USB
VSS_OSC ⁽²⁹⁾
VSS_RTC ⁽³⁰⁾
nRESETIN_OUT
xdma_event_intr0
timer4
clkout1
spi1_cs1
pr1_pru1_pru_r31_16
EMU2
gpio0_19
NA
GND
NA
GND
NA
A
NA
A
0
I/OD ⁽⁸⁾ 0 ⁽²⁶⁾
0(PU) ⁽¹¹⁾
0
0
I
Z
(4)
(9)
2
I/O
3
O
4
I/O
5
I
6
I/O
7
I/O
VDDSHV6
VDDSHV6
Yes
4
Yes
4
PU/PD
PU/PD
LVCMOS
LVCMOS
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Terminal Configuration and Functions
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