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AMIC110 Datasheet, PDF (40/214 Pages) Texas Instruments – Sitara Processors
AMIC110
SPRS971A – AUGUST 2016 – REVISED SEPTEMBER 2016
www.ti.com
Table 4-4. Pin Attributes (ZCZ Package) (continued)
ZCZ BALL
NUMBER [1]
PIN NAME [2]
SIGNAL NAME [3]
MODE [4]
TYPE [5]
BALL RESET
STATE [6]
BALL RESET
REL. STATE
[7]
RESET REL.
MODE [8]
ZCZ POWER [9] HYS [10]
BUFFER
STRENGTH
(mA) [11]
PULLUP
/DOWN TYPE
[12]
I/O CELL [13]
D14
XDMA_EVENT_INTR1
xdma_event_intr1
0
I
Z
L
7
VDDSHV6
Yes
4
PU/PD
LVCMOS
tclkin
2
I
clkout2
3
O
timer7
4
I/O
pr1_pru0_pru_r31_16
5
I
EMU3
6
I/O
V10
XTALIN
U11
XTALOUT
gpio0_20
OSC0_IN
OSC0_OUT
7
I/O
0
I
Z
Z
0
VDDS_OSC Yes
NA
PD (2)
LVCMOS
0
O
(25)
(25)
0
VDDS_OSC NA
NA (16)
NA
LVCMOS
(1) An internal 10 kohm pull up is turned on when the oscillator is diasabled. The oscillator is disabled by default after power is applied.
(2) An internal 15 kohm pull down is turned on when the oscillator is disabled. The oscillator is enabled by default after power is applied.
(3) Do not connect anything to this terminal.
(4) If sysboot[5] is low on the rising edge of PWRONRSTn, this terminal has an internal pull-down turned on after reset is released. If sysboot[5] is high on the rising edge or PWRONRSTn,
this terminal will initially be driven low after reset is released then it begins to toggle at the same frequency of the XTALIN terminal.
(5) LCD_DATA[15:0] terminals are respectively SYSBOOT[15:0] inputs, latched on the rising edge of PWRONRSTn.
(6) Mode1 and Mode2 signal assignments for this terminal are only available with silicon revision 2.0 or newer devices.
(7) Mode2 signal assignment for this terminal is only available with silicon revision 2.0 or newer devices.
(8) Refer to the External Warm Reset section of the AM335x and AMIC110 Sitara Processors Technical Reference Manual for more information related to the operation of this terminal.
(9) Reset Release Mode = 7 if sysboot[5] is low. Mode = 3 if sysboot[5] is high.
(10) Silicon revision 1.0 devices only provide the MMC2_DAT7 signal when Mode3 is selected. Silicon revision 2.0 and newer devices implement another level of pin multiplexing which
provides the original MMC2_DAT7 signal or RMII2_CRS_DV signal when Mode3 is selected. This new level of pin multiplexing is selected with bit zero of the SMA2 register. For more
details refer to the Control Module section of the AM335x and AMIC110 Sitara Processors Technical Reference Manual.
(11) The 0(PU) indicates that this terminal is initially low based on the description in the AM335x and AMIC110 Sitara Processors Technical Reference Manual. However, it is also has a weak
internal pull up applied.
(12) The input voltage thresholds for this input are not a function of VDDSHV6. Please refer to the DC Electrical Characteristics section for details related to electrical parameters associated
with this input terminal.
(13) The internal USB PHY can be configured to multiplex the UART2_TX or UART2_RX signals to this terminal. For more details refer to USB GPIO Details section of the AM335x and
AMIC110 Sitara Processors Technical Reference Manual.
(14) The internal USB PHY can be configured to multiplex the UART3_TX or UART3_RX signals to this terminal. For more details refer to USB GPIO Details section of the AM335x and
AMIC110 Sitara Processors Technical Reference Manual.
(15) This function is not available on this device, but signal names are retained for consistency with the AM335x family of devices.
(16) This output should only be used to source the recommended crystal circuit.
(17) This parameter only applies when this USB PHY terminal is operating in UART2 mode.
(18) This parameter only applies when this USB PHY terminal is operating in UART3 mode.
(19) This terminal is a analog input used to set the switching threshold of the DDR input buffers to (VDDS_DDR / 2).
(20) This terminal is a analog passive signal that connects to an external 49.9 ohm 1%, 20mW reference resistor which is used to calibrate the DDR input/output buffers.
(21) This terminal is analog input that may also be configured as an open-drain output.
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Terminal Configuration and Functions
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