AMIC110 Datasheet, PDF (199/214 Pages) Texas Instruments – Sitara Processors

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AMIC110
SPRS971A – AUGUST 2016 – REVISED SEPTEMBER 2016
Table 7-91. PRU-ICSS MII_RT Switching Characteristics - MII_TXD[3:0] and MII_TXEN
(see Figure 7-83)
NO
.
10 Mbps
MIN TYP
MAX
100 Mbps
UNIT
MIN TYP MAX
1 ^{td(TX_CLK-TXD)}
Delay time, TX_CLK high to TXD[3:0] valid
5
t_{d(TX_CLK-TX_EN)}
Delay time, TX_CLK to TX_EN valid
25
5
25 ns
1
MII_TXCLK (input)
MII_TXD[3:0],
MII_TXEN (outputs)
Figure 7-83. PRU-ICSS MII_TXD[3:0], MII_TXEN Timing
7.14.4 PRU-ICSS Universal Asynchronous Receiver Transmitter (PRU-ICSS UART)
Table 7-92. Timing Requirements for PRU-ICSS UART Receive
(see Figure 7-84)
NO.
3
t_w(RX)
Pulse duration, receive start, stop, data bit
MIN
0.96U ⁽¹⁾
(1) U = UART baud time = 1/programmed baud rate.
MAX
1.05U ⁽¹⁾
UNIT
ns
Table 7-93. Switching Characteristics Over Recommended Operating Conditions for PRU-ICSS UART
Transmit
(see Figure 7-84)
NO.
PARAMETER
MIN
MAX UNIT
1
ƒ_baud(baud)
2
t_w(TX)
Maximum programmable baud rate
Pulse duration, transmit start, stop, data bit
0
U – 2 ⁽¹⁾
12
U + 2⁽¹⁾
MHz
ns
(1) U = UART baud time = 1/programmed baud rate.
3
2
UART_TXD
Start
Bit
Data Bits
5
4
UART_RXD
Start
Bit
Data Bits
Figure 7-84. PRU-ICSS UART Timing
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