AMIC110 Datasheet, PDF (169/214 Pages) Texas Instruments – Sitara Processors

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AMIC110
SPRS971A – AUGUST 2016 – REVISED SEPTEMBER 2016
x = 0, 1
AMIC110
DQS[x]
I/O Buffer
DQS[x]+
DQS[x]-
DDR3
DQS[x]
I/O Buffer
Routed Differentially
Copyright © 2016, Texas Instruments Incorporated
Figure 7-48. DQS[x] Topology
x = 0, 1
AMIC110
DQ[x]
I/O Buffer
DQ[x]
DDR3
DQ[x]
I/O Buffer
Copyright © 2016, Texas Instruments Incorporated
Figure 7-49. DQ[x] Topology
7.7.2.3.5.2 DQS[x] and DQ[x] Routing, Any Number of Allowed DDR3 Devices
Figure 7-50 and Figure 7-51 show the DQS[x] and DQ[x] routing.
DQS[x]+
DQS[x]-
DQS[x]
Routed Differentially
x = 0, 1
Figure 7-50. DQS[x] Routing With Any Number of Allowed DDR3 Devices
DQ[x]
x = 0, 1
Figure 7-51. DQ[x] Routing With Any Number of Allowed DDR3 Devices
Copyright © 2016, Texas Instruments Incorporated
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Peripheral Information and Timings 169