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AMIC110 Datasheet, PDF (174/214 Pages) Texas Instruments – Sitara Processors
AMIC110
SPRS971A – AUGUST 2016 – REVISED SEPTEMBER 2016
www.ti.com
I2C[x]_SDA
I2C[x]_SCL
11
8
4
10
6
5
1
3
12
7
3
2
9
14
13
Stop
Start
Repeated
Start
Stop
Figure 7-54. I2C Receive Timing
(see Figure 7-55)
NO.
15 tc(SCL)
16 tsu(SCLH-SDAL)
17 th(SDAL-SCLL)
18 tw(SCLL)
19 tw(SCLH)
20 tsu(SDAV-SCLH)
21 th(SCLL-SDAV)
22 tw(SDAH)
23 tr(SDA)
24 tr(SCL)
25 tf(SDA)
26 tf(SCL)
27 tsu(SCLH-SDAH)
Table 7-55. Switching Characteristics for I2C Output Timings
PARAMETER
Cycle time, SCL
Setup time, SCL high before SDA low (for a repeated
START condition)
Hold time, SCL low after SDA low (for a START and a
repeated START condition)
Pulse duration, SCL low
Pulse duration, SCL high
Setup time, SDA valid before SCL high
Hold time, SDA valid after SCL low
Pulse duration, SDA high between STOP and START
conditions
Rise time, SDA
Rise time, SCL
Fall time, SDA
Fall time, SCL
Setup time, high before SDA high (for STOP condition)
STANDARD MODE
MIN
MAX
10
4.7
4
4.7
4
250
0
3.45
4.7
1000
1000
300
300
4
FAST MODE
UNIT
MIN
MAX
2.5
µs
0.6
µs
0.6
µs
1.3
µs
0.6
µs
100
ns
0
0.9 µs
1.3
µs
300 ns
300 ns
300 ns
300 ns
0.6
µs
I2C[x]_SDA
I2C[x]_SCL
25
22
18
24
20
19
15
17
26
21
17
16
Stop Start
Repeated
Start
Figure 7-55. I2C Transmit Timing
23
27
Stop
174 Peripheral Information and Timings
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