C8051F52X_12 Datasheet, PDF (96/221 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

C8051F52x/F53x
Table 9.2. Special Function Registers (Continued)
SFRs are listed in alphabetical order. All undefined SFR locations are reserved
Register
OSCICN
OSCXCN
P0
P0MASK
P0MAT
P0MDIN
P0MDOUT
P0SKIP
P1
P1MASK
P1MAT
P1MDIN
Address
0xB2
0xB1
0x80
0xC7
0xD7
0xF1
0xA4
0xD4
0x90
0xBF
0xCF
0xF2
Description
Internal Oscillator Control
External Oscillator Control
Port 0 Latch
Port 0 Mask
Port 0 Match
Port 0 Input Mode Configuration
Port 0 Output Mode Configuration
Port 0 Skip
Port 1 Latch
Port 1 Mask
Port 1 Match
Port 1 Input Mode Configuration
P1MDOUT 0xA5
P1SKIP
0xD5
PCA0CN 0xD8
PCA0CPH0 0xFC
PCA0CPH1 0xEA
PCA0CPH2 0xEC
Port 1 Output Mode Configuration
Port 1 Skip
PCA Control
PCA Capture 0 High
PCA Capture 1 High
PCA Capture 2 High
PCA0CPL0 0xFB
PCA0CPL1 0xE9
PCA0CPL2 0xEB
PCA0CPM0 0xDA
PCA0CPM1 0xDB
PCA0CPM2 0xDC
PCA0H
0xFA
PCA0L
0xF9
PCA0MD 0xD9
PCON
0x87
PSCTL
0x8F
PSW
0xD0
PCA Capture 0 Low
PCA Capture 1 Low
PCA Capture 2 Low
PCA Module 0 Mode
PCA Module 1 Mode
PCA Module 2 Mode
PCA Counter High
PCA Counter Low
PCA Mode
Power Control
Program Store R/W Control
Program Status Word
96
Rev. 1.4
Page
137
142
129
131
131
129
130
130
132
134
134
132
133
133
206
209
209
209
209
209
209
208
208
208
209
209
207
91
119
88