C8051F52X_12 Datasheet, PDF (43/221 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

C8051F52x/F53x

Figure 3.5. TSSOP-20 Package Diagram
Table 3.5. TSSOP-20 Package Diagram Dimensions
Symbol
Min
Nom
Max
A
—
A1
0.05
A2
0.80
—
1.20
—
0.15
1.00
1.05
b
0.19
—
0.30
c
0.09
—
0.20
D
6.40
6.50
6.60
e
0.65 BSC.
E
6.40 BSC.
E1
4.30
4.40
4.50
L
0.45
0.60
0.75
1
0°
—
8°
aaa
0.10
bbb
0.10
ddd
0.20
Notes:
1. All dimensions shown are in millimeters (mm).
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to JEDEC outline MO-153, variation AC.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020
specification for Small Body Components.
Rev. 1.4
43