C8051F52X_12 Datasheet, PDF (47/221 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

C8051F52x/F53x
Table 3.7. Pin Definitions for the C8051F53x and C805153xA (QFN 20) (Continued)
Name Pin Numbers Type Description
P1.0/
XTAL2
‘F53xA ‘F53x
‘F53x-C
13 13 D I/O or Port 1.0. See Port I/O Section for a complete description.
A In
D I/O
External Clock Output. For an external crystal or resonator, this
pin is the excitation driver. This pin is the external clock input for
CMOS, capacitor, or RC oscillator configurations. Section
“14. Oscillators” on page 135.
P0.7/
14 14 D I/O or Port 0.7. See Port I/O Section for a complete description.
XTAL1
A In
External Clock Input. This pin is the external oscillator return for
a crystal or resonator. See Oscillator Section.
P0.6/
15 15 D I/O or Port 0.6. See Port I/O Section for a complete description.
A In
C2D
D I/O ^{Bi-directional data signal for the C2 Debug Interface.}
P0.5/RX* 16 — D I/O or Port 0.5. See Port I/O Section for a complete description.
A In
P0.5
— 16 D I/O or Port 0.5. See Port I/O Section for a complete description.
A In
P0.4/TX* 17 — D I/O or Port 0.4. See Port I/O Section for a complete description.
A In
P0.4/RX* — 17 D I/O or Port 0.4. See Port I/O Section for a complete description.
A In
P0.3
18 — D I/O or Port 0.3. See Port I/O Section for a complete description.
A In
P0.3/TX* — 18 D I/O or Port 0.3. See Port I/O Section for a complete description.
A In
P0.2
19 19 D I/O or Port 0.2. See Port I/O Section for a complete description.
A In
P0.1
20 20 D I/O or Port 0.1. See Port I/O Section for a complete description.
A In
Note: Please refer to Section “20. Device Specific Behavior” on page 210.
Rev. 1.4
47