C8051F52X_12 Datasheet, PDF (172/221 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

C8051F52x/F53x
17.7. LIN Registers
The following Special Function Registers (SFRs) are available:
17.7.1. LIN Direct Access SFR Registers Definition
SFR Definition 17.1. LINADDR: Indirect Address Register
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address: 0x92
Bit7–0:
LINADDR7-0: LIN Indirect Address Register Bits.
This register hold an 8-bit address used to indirectly access the LIN0 core registers.
Table 17.4 lists the LIN0 core registers and their indirect addresses. Reads and writes to
LINDATA will target the register indicated by the LINADDR bits.
SFR Definition 17.2. LINDATA: LIN Data Register
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address: 0x93
Bit7–0:
LINDATA7-0: LIN Indirect Data Register Bits.
When this register is read, it will read the contents of the LIN0 core register pointed to by
LINADDR.
When this register is written, it will write the value to the LIN0 core register pointed to by LIN-
ADDR.
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Rev. 1.4