C8051F52X_12 Datasheet, PDF(74/221 Page) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

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C8051F52X_12 Datasheet, PDF (74/221 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

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C8051F52x/F53x

6. Voltage Regulator (REG0)

C8051F52x/F52xA/F53x/F53xAdevices include an on-chip low dropout voltage regulator (REG0). The

input to REG0 at the VREGIN pin can be as high as 5.25 V. The output can be selected by software to 2.1 V

or 2.6 V. When enabled, the output of REG0 appears on the VDD pin, powers the microcontroller core, and

can be used to power external devices. On reset, REG0 is enabled and can be disabled by software.

The input (VREGIN) and output (VDD) of the voltage regulator should both be bypassed with a large capaci-

tor (4.7 ÂµF + 0.1 ÂµF) to ground. These capacitors are required for regulator stability, and will eliminate

power spikes and provide any immediate power required by the microcontroller. The settling time associ-

ated with the voltage regulator is shown in Table 2.6 on page 30.

Important Note: The bypass capacitors are required for the stability of the voltage regulator.

The voltage regulator can also generate an interrupt (if enabled by EREG0, EIE1.6) that is triggered when-

ever the VREGIN input voltage drops below the dropout threshold (see Table 2.6 on page 30). This dropout

interrupt has no pending flag. The recommended procedure to use the interrupt is as follows:

1. Wait enough time to ensure the VREGIN input voltage is stable.

2. Enable the dropout interrupt (EREG0, EIE1.6) and select the proper priority (PREG0, EIP1.6).

3. If triggered, disable the interrupt in the Interrupt Service Routine (clear EREG0, EIE1.6) and execute all

necessary procedures to put the system in âsafe mode,â leaving the interrupt disabled.

4. The main application, now running in safe mode, should regularly check the DROPOUT bit

(REG0CN.0). Once it is cleared by the regulator hardware, the application can re-enable the interrupt

(EREG0, EIE1.6) and return to normal mode operation.

REG0

4.7 ÂµF

VDD

4.7 ÂµF

VREGIN

.1 ÂµF

VDD

.1 ÂµF

Figure 6.1. External Capacitors for Voltage Regulator Input/Output

74

Rev. 1.4

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