C8051F52X_12 Datasheet, PDF (79/221 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

C8051F52x/F53x
SFR Definition 7.2. CPT0MX: Comparator0 MUX Selection
R/W
CMX0N3
Bit7
R/W
CMX0N2
Bit6
R/W
CMX0N1
Bit5
R/W
CMX0N0
Bit4
R/W
CMX0P3
Bit3
R/W
CMX0P2
Bit2
R/W
CMX0P1
Bit1
R/W
Reset Value
CMX0P0 01110111
Bit0 SFR Address:
0x9F
Bits7–4: CMX0N3–CMX0N0: Comparator0 Negative Input MUX Select.
These bits select which Port pin is used as the Comparator0 negative input.
CMX0N3 CMX0N2 CMX0N1 CMX0N0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
Negative Input
P0.1
P0.3
P0.5
P0.7*
P1.1*
P1.3*
P1.5*
P1.7*
*Note: Available only on the C8051F53x/53xA devices
Bits1–0: CMX0P3–CMX0P0: Comparator0 Positive Input MUX Select.
These bits select which Port pin is used as the Comparator0 positive input.
CMX0P3 CMX0P2 CMX0P1 CMX0P0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
Positive Input
P0.0
P0.2
P0.4
P0.6*
P1.0*
P1.2*
P1.4*
P1.6*
*Note: Available only on the C8051F53x/53xA devices.
Rev. 1.4
79