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C8051F52X_12 Datasheet, PDF (201/221 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family
C8051F52x/F53x
19.2.4. Frequency Output Mode
Frequency Output Mode produces a programmable-frequency square wave on the module’s associated
CEXn pin. The capture/compare module high byte holds the number of PCA clocks to count before the out-
put is toggled. The frequency of the square wave is then defined by Equation 19.1.
FCEXn
=
---------------F----P---C---A---------------
2  PCA0CPHn
Note: A value of 0x00 in the PCA0CPHn register is equal to 256 for this equation.
Equation 19.1. Square Wave Frequency Output
Where FPCA is the frequency of the clock selected by the CPS2-0 bits in the PCA mode register, PCA0MD.
The lower byte of the capture/compare module is compared to the PCA counter low byte; on a match,
CEXn is toggled and the offset held in the high byte is added to the matched value in PCA0CPLn. Fre-
quency Output Mode is enabled by setting the ECOMn, TOGn, and PWMn bits in the PCA0CPMn register.
PCA0CPMn
P ECCMT P E
WCA A AOWC
MOPP TGMC
1 MPN n n n F
6nnn
n
n
0 0001 0
PCA0CPLn
Enable
8-bit
Comparator
8-bit Adder
PCA0CPHn
Adder
Enable
Toggle
match
TOGn
0 CEXn Crossbar
1
Port I/O
PCA Timebase
PCA0L
Figure 19.7. PCA Frequency Output Mode
Rev. 1.4
201