C8051F52X_12 Datasheet, PDF (26/221 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

C8051F52x/F53x
2.2. Electrical Characteristics
Table 2.2. Global DC Electrical Characteristics
–40 to +125 °C, 25 MHz System Clock unless otherwise specified. Typical values are given at 25 °C
Parameter
Conditions
Min Typ Max Units
Supply Input Voltage (V_REGIN)¹
Output Current < 1 mA
C8051F52x/53x
C8051F52xA/53xA
C8051F52x-C/53x-C
2.7 — 5.25
V
1.8¹ — 5.25
V
2.0¹ — 5.25
V
Digital Supply Voltage (V_DD)
C8051F52x/53x
C8051F52xA/53xA
C8051F52x-C/53x-C
2.0 — 2.7
V
1.8 — 2.7
V
2.0 — 2.75
V
Core Supply RAM Data Retention
Voltage
SYSCLK (System Clock)²
— 1.5 — V
0
— 25 MHz
Specified Operating Temperature Range
–40 — +125 °C
Digital Supply Current—CPU Active (Normal Mode, fetching instructions from Flash)
I_DD3,4
V_DD = 2.1 V:
Clock = 32 kHz
Clock = 200 kHz
Clock = 1 MHz
Clock = 25 MHz
V_DD = 2.6 V:
Clock = 32 kHz
Clock = 200 kHz
Clock = 1 MHz
Clock = 25 MHz
—
13
—
µA
—
60
—
µA
— 0.28 —
mA
— 5.1
9
mA
—
22
—
µA
— 105 —
µA
— 0.5 —
mA
— 7.3 13
mA
I_DD Frequency Sensitivity^3,5
T = 25 °C:
V_DD = 2.1 V, F < 12 MHz
V_DD = 2.1 V, F > 12 MHz
V_DD = 2.6 V, F < 12 MHz
V_DD = 2.6 V, F > 12 MHz
— 0.276 — mA/MHz
— 0.140 — mA/MHz
— 0.424 — mA/MHz
— 0.184 — mA/MHz
Notes:
1. For more information on V_REGIN characteristics, see Table 2.6 on page 30.
2. SYSCLK must be at least 32 kHz to enable debugging.
3. Based on device characterization data; Not production tested.
4. Does not include internal oscillator or internal regulator supply current.
5. I_DD can be estimated for frequencies <= 12 MHz by multiplying the frequency of interest by the frequency
sensitivity number for that range. When using these numbers to estimate I_DD > 12 MHz, the estimate should be
the current at 25 MHz minus the difference in current indicated by the frequency sensitivity number. For
example: V_DD = 2.6 V; F= 20 MHz, I_DD = 7.3 mA – (25 MHz – 20 MHz) x 0.184 mA/MHz = 6.38 mA.
6. Idle I_DD can be estimated for frequencies <= 1 MHz by multiplying the frequency of interest by the frequency
sensitivity number for that range. When using these numbers to estimate I_DD > 1 MHz, the estimate should be
the current at 25 MHz minus the difference in current indicated by the frequency sensitivity number. For
example: V_DD = 2.6 V; F= 5 MHz, Idle I_DD = 3 mA – (25 MHz– 5 MHz) x 118 µA/MHz = 0.64 mA.
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Rev. 1.4