C8051F52X_12 Datasheet, PDF (9/221 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

C8051F52x/F53x
List of Tables
Table 1.1. Product Selection Guide (Recommended for New Designs) .................. 14
Table 1.2. Product Selection Guide (Not Recommended for New Designs) ........... 15
Table 1.3. Operating Modes Summary .................................................................... 21
Table 2.1. Absolute Maximum Ratings .................................................................... 25
Table 2.2. Global DC Electrical Characteristics ....................................................... 26
Table 2.3. ADC0 Electrical Characteristics .............................................................. 28
Table 2.4. Temperature Sensor Electrical Characteristics ...................................... 29
Table 2.5. Voltage Reference Electrical Characteristics ......................................... 29
Table 2.6. Voltage Regulator Electrical Specifications ............................................ 30
Table 2.7. Comparator Electrical Characteristics .................................................... 31
Table 2.8. Reset Electrical Characteristics .............................................................. 32
Table 2.9. Flash Electrical Characteristics .............................................................. 33
Table 2.10. Port I/O DC Electrical Characteristics ................................................... 33
Table 2.11. Internal Oscillator Electrical Characteristics ......................................... 34
Table 3.1. Pin Definitions for the C8051F52x and C8051F52xA (DFN 10) ............. 36
Table 3.2. DFN-10 Package Diagram Dimensions .................................................. 38
Table 3.3. DFN-10 Landing Diagram Dimensions ................................................... 39
Table 3.4. Pin Definitions for the C8051F53x and C805153xA (TSSOP 20) .......... 40
Table 3.5. TSSOP-20 Package Diagram Dimensions ............................................. 43
Table 3.6. TSSOP-20 Landing Diagram Dimensions .............................................. 44
Table 3.7. Pin Definitions for the C8051F53x and C805153xA (QFN 20) ............... 46
Table 3.8. QFN-20 Package Diagram Dimensions ................................................. 49
Table 3.9. QFN-20 Landing Diagram Dimensions ................................................... 51
Table 8.1. CIP-51 Instruction Set Summary ............................................................ 83
Table 9.1. Special Function Register (SFR) Memory Map ...................................... 94
Table 9.2. Special Function Registers ..................................................................... 95
Table 10.1. Interrupt Summary ................................................................................ 99
Table 12.1. Flash Security Summary .................................................................... 118
Table 15.1. Timer Settings for Standard Baud Rates 
Using the Internal Oscillator ............................................................... 150
Table 16.1. SPI Slave Timing Parameters ............................................................ 163
Table 17.1. Baud-Rate Calculation Variable Ranges ............................................ 166
Table 17.2. Manual Baud Rate Parameters Examples ......................................... 167
Table 17.3. Autobaud Parameters Examples ........................................................ 168
Table 17.4. LIN Registers* (Indirectly Addressable) .............................................. 174
Table 19.1. PCA Timebase Input Options ............................................................. 196
Table 19.2. PCA0CPM Register Settings for PCA Capture/Compare Modules .... 197
Table 19.3. Watchdog Timer Timeout Intervals1 ................................................... 205
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