C8051F52X_12 Datasheet, PDF (4/221 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

C8051F52x/F53x
8.3.2. Stop Mode................................................................................................. 90
8.3.3. Suspend Mode .......................................................................................... 90
9. Memory Organization and SFRs............................................................................. 92
9.1. Program Memory............................................................................................... 92
9.2. Data Memory ..................................................................................................... 93
9.3. General Purpose Registers ............................................................................... 93
9.4. Bit Addressable Locations ................................................................................. 93
9.5. Stack ............................................................................................................ 93
9.6. Special Function Registers................................................................................ 93
10. Interrupt Handler.................................................................................................... 98
10.1. MCU Interrupt Sources and Vectors................................................................ 98
10.2. Interrupt Priorities ............................................................................................ 98
10.3. Interrupt Latency.............................................................................................. 98
10.4. Interrupt Register Descriptions ...................................................................... 100
10.5. External Interrupts ......................................................................................... 104
11. Reset Sources ...................................................................................................... 106
11.1. Power-On Reset ............................................................................................ 107
11.2. Power-Fail Reset / VDD Monitors (VDDMON0 and VDDMON1) .................. 108
11.2.1. VDD Monitor Thresholds and Minimum VDD........................................ 108
11.3. External Reset ............................................................................................... 110
11.4. Missing Clock Detector Reset ....................................................................... 110
11.5. Comparator Reset ......................................................................................... 110
11.6. PCA Watchdog Timer Reset ......................................................................... 110
11.7. Flash Error Reset .......................................................................................... 110
11.8. Software Reset .............................................................................................. 111
12. Flash Memory....................................................................................................... 113
12.1. Programming The Flash Memory .................................................................. 113
12.1.1. Flash Lock and Key Functions .............................................................. 113
12.1.2. Flash Erase Procedure ......................................................................... 114
12.1.3. Flash Write Procedure .......................................................................... 114
12.2. Flash Write and Erase Guidelines ................................................................. 115
12.2.1. V_DD Maintenance and the V_DD monitor ................................................ 115
12.2.2. PSWE Maintenance .............................................................................. 115
12.2.3. System Clock ........................................................................................ 116
12.3. Non-volatile Data Storage ............................................................................. 117
12.4. Security Options ............................................................................................ 117
13. Port Input/Output ................................................................................................. 120
13.1. Priority Crossbar Decoder ............................................................................. 122
13.2. Port I/O Initialization ...................................................................................... 126
13.3. General Purpose Port I/O .............................................................................. 128
14. Oscillators ............................................................................................................ 135
14.1. Programmable Internal Oscillator .................................................................. 135
14.1.1. Internal Oscillator Suspend Mode ......................................................... 136
14.2. External Oscillator Drive Circuit..................................................................... 139
14.2.1. Clocking Timers Directly Through the External Oscillator..................... 139
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Rev. 1.4