C8051F52X_12 Datasheet, PDF (174/221 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

C8051F52x/F53x
17.7.2. LIN Indirect Access SFR Registers Definition
Table 17.4. LIN Registers* (Indirectly Addressable)
Name Address Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
LIN0DT1 0x00
DATA1[7:0]
LIN0DT2 0x01
DATA2[7:0]
LIN0DT3 0x02
DATA3[7:0]
LIN0DT4 0x03
DATA4[7:0]
LIN0DT5 0x04
DATA5[7:0]
LIN0DT6 0x05
DATA6[7:0]
LIN0DT7 0x06
DATA7[7:0]
LIN0DT8 0x07
DATA8[7:0]
LIN0CTRL 0x08 STOP(s) SLEEP(s) TXRX DTACK(s) RSTINT RSTERR WUPREQ STREQ(m)
LIN0ST 0x09 ACTIVE IDLTOUT ABORT(s) DTREQ(s) LININT ERROR WAKEUP DONE
LIN0ERR 0x0A
SYNCH(s) PRTY(s) TOUT CHK BITERR
LIN0SIZE 0x0B ENHCHK
LINSIZE[3:0]
LIN0DIV 0x0C
DIVLSB[7:0]
LIN0MUL 0x0D PRESCL[1:0]
LINMUL[4:0]
DIV9
LIN0ID 0x0E
ID[5:0]
*These registers are used in both master and slave mode. The register bits marked with (m) are accessible
only in Master mode while the register bits marked with (s) are accessible only in slave mode. All other reg-
isters are accessible in both modes.
SFR Definition 17.4. LIN0DT1: LIN0 Data Byte 1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x00 (indi-
Address: _rect)
Bit7–0: LIN0DT1: LIN Data Byte 1.
Serial Data Byte 1 that is received or transmitted across the LIN interface.
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Rev. 1.4