C8051F52X_12 Datasheet, PDF (162/221 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

C8051F52x/F53x
NSS
T
SE
SCK*
T
CKH
T
CKL
T
SIS
T
SIH
MOSI
MISO
T
SEZ
T
SOH
* SCK is shown for CKPOL = 0. SCK is the opposite polarity for CKPOL = 1.
Figure 16.8. SPI Slave Timing (CKPHA = 0)
NSS
T
SE
SCK*
T
CKL
T
CKH
T
SIS
T
SIH
MOSI
T
SEZ
MISO
T
SOH
* SCK is shown for CKPOL = 0. SCK is the opposite polarity for CKPOL = 1.
Figure 16.9. SPI Slave Timing (CKPHA = 1)
T
SD
T
SDZ
T
SD
T
SDZ
162
Rev. 1.4