C8051F52X_12 Datasheet, PDF (138/221 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

C8051F52x/F53x
SFR Definition 14.2. OSCICL: Internal Oscillator Calibration
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
—
OSCICL
Varies
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address: 0xB3
Bit7: UNUSED. Read = 0b. Write = don’t care.
Bits6–0: OSCICL: Internal Oscillator Calibration Register.
This register determines the internal oscillator period. On C8051F52x/53x devices, the reset
value is factory calibrated to generate an internal oscillator frequency of 24.5 MHz.
SFR Definition 14.3. OSCIFIN: Internal Fine Oscillator Calibration
R/W
R/W
R/W
R
R
R/W
R/W
R/W
Reset Value
—
—
OSCIFIN
undetermined
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Bit Addressable
SFR Address:
0xB0
Bits7–6: UNUSED. Read = 00b, Write = don't care.
Bits5–0: OSCIFIN. Internal oscillator fine adjustment bits.
The valid range is between 0x00 and 0x27.
This register is a fine adjustment for the internal oscillator period. On
C8051F52x/52xA/53x/53xA devices, the reset value is factory calibrated to generate an
internal oscillator frequency of 24.5 MHz.
138
Rev. 1.4