C8051F52X_12 Datasheet, PDF (37/221 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

C8051F52x/F53x
Table 3.1. Pin Definitions for the C8051F52x and C8051F52xA (DFN 10) (Continued)
Name Pin Numbers Type Description
‘F52xA ‘F52x
‘F52x-C
P0.3/TX*/ —
8 D I/O or Port 0.3. See Port I/O Section for a complete description.
A In
XTAL2
P0.2
D I/O
External Clock Output. For an external crystal or resonator, this
pin is the excitation driver. This pin is the external clock input for
CMOS, capacitor, or RC oscillator configurations. See Section
“14. Oscillators” on page 135.
9
9 D I/O or Port 0.2. See Port I/O Section for a complete description.
XTAL1
P0.1/
A In ^{External Clock Input. This pin is the external oscillator return for a}
crystal or resonator. Section “14. Oscillators” on page 135.
10 10 D I/O or Port 0.1. See Port I/O Section for a complete description.
A In
C2D
Bi-directional data signal for the C2 Debug Interface
D I/O
Note: Please refer to Section “20. Device Specific Behavior” on page 210.
Rev. 1.4
37