C8051F52X_12 Datasheet, PDF (216/221 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

C8051F52x/F53x
21.2. C2 Pin Sharing
The C2 protocol allows the C2 pins to be shared with user functions so that in-system debugging and
Flash programming functions may be performed. This is possible because C2 communication is typically
performed when the device is in the halt state, where all on-chip peripherals and user software are stalled.
In this halted state, the C2 interface can safely ‘borrow’ the C2CK (/RST) and C2D (P0.1 or P0.6) pins. In
most applications, external resistors are required to isolate C2 interface traffic from the user application. A
typical isolation configuration is shown in Figure 21.1.
C8051Fxxx
/Reset (a)
Input (b)
Output (c)
C2CK
C2D
C2 Interface Master
Figure 21.1. Typical C2 Pin Sharing
The configuration in Figure 21.1 assumes the following:
1. The user input (b) cannot change state while the target device is halted.
2. The /RST pin on the target device is used as an input only.
Additional resistors may be necessary depending on the specific application.
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