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C8051F52X_12 Datasheet, PDF (30/221 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family
C8051F52x/F53x
Table 2.6. Voltage Regulator Electrical Specifications
VDD = 2.1 or 2.6 V; –40 to +125 °C unless otherwise specified.
Parameter
Conditions
Min
Input Voltage Range (VREGIN) C8051F52x/53x
2.71
C8051F52xA/53xA
VDD connected to VREGIN
1.8
VDD not connected to VREGIN
2.22
C8051F52x-C/53x-C
Dropout Voltage (VDO)
Output Voltage (VDD)
VDD connected to VREGIN
2.0
VDD not connected to VREGIN
2.22
Output Current = 1-50 mA
—
Output Current = 1 to 50 mA
REG0MD = 0
2.0
REG0MD = 1
2.5
Bias Current
2.1 V operation 
—
(REG0MD = 0; T = 25 °C)
2.6 V operation 
—
(REG0MD = 1; T = 25 °C)
Dropout Indicator Detection
—
Threshold
Output Voltage Temperature
—
Coefficient
VREG Settling Time
50 mA load with VREGIN = 2.4 V and
—
VDD load capacitor of 4.8 µF
Notes:
1. The minimum input voltage is 2.7 V or VDD + VDO(max load), whichever is greater.
2. The minimum input voltage is 2.2 V or VDD + VDO(max load), whichever is greater.
Typ
—
—
—
—
—
10
2.1
2.6
1
1
75
0.25
250
Max Units
5.25 V
2.7
5.25
2.75
5.25
— mV/mA
V
2.25
2.75
5
µA
5
— mV
— mV/ºC
—
µs
30
Rev. 1.4